X3-DIO

Innovative Integration

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FEATURES

  • 64 single-end/32 differential digital I/O
  • 100 MHz signal rates to using LVDS
  • 50 MHz LVCMOS signal rates
  • 400 MB/s LVDS capture/playback to SRAM
  • Optional on-card termination
  • Xilinx Spartan3A , 1.8M gate FPGA
  • 4 MB SRAM
  • External clocking and triggeringProgrammable time base
  • Framed, software or external triggering
  • Log acquisition timing and events
  • 48 bits digital I/O on J16
  • Power Management
  • XMC Module (75 mm x150 mm)
  • PCI Express (VITA 42.3)
  • Applications: pattern generation, custom digital interfaces for remote I/O and digital controls

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