Infineon Technologies Corporation

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A single-core computing engine that provides real-time microcontroller and DSP functionality while using a single application development environment and system design tool chain


  • 32-bit TeiCore architecture implements a unified instruction set that contains instructions for both control and DSP tasks, executed on a single processing engine
  • Configurable cache and program memory including on-chip SRAM, allows flexibility to obtain optimal results for specific applications
  • 4 operations/cycle
  • Peripheral control processor offloads time-critical interrupts and DMA transfers from the CPU
  • 16-bit and 32-bit instruction format increases code density
  • 66 MHz bus interfaces to external memories including SDRAM
  • Low interrupt latency and fast context switching allows clean, fast, and efficient processing of multiple tasks on one engine
  • On-chip peripherals include timers, synchronous and asynchronous serial links, and parallel ports

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