Pentek releases new member of Jade family at IMS 2018
IMS 2018 - PHILADELPHIA. Pentek officials announced the company is releasing a new member of its Jade family of high-speed data converter XMC FPGA modules at this year's International Microwave Symposium (IMS).
The Model 71865 functions include two A/D acquisition IP modules for simplifying data capture and transfer. Each acquisition IP module contains a powerful controller for all data clocking, triggering and synchronization functions. From each of the two acquisition modules, A/D sample data flows into identical IP modules consisting of banks of wideband and narrowband DDCs. Finally, data is delivered to four DMA controllers linked to the PCIe Gen.3 x8 interface for transfer to a signal processor.
The four wideband DDCs can be set for decimation values between 8 and 128 in steps of 4, providing usable output bandwidths from 1.25 MHz to 20 MHz. The wideband DDCs can be quite effective in locating signals of interest.
Each of the six narrowband DDC banks can be configured to operate in three different modes, where each mode provides a different quantity of DDC channels and range of decimations. Output bandwidths range from 20 kHz to 1.25 MHz. All DDCs can be independently tuned from 0 Hz to 200 MHz with 32 bits of resolution.
Three banks of resampling filters accept input samples from each narrowband DDC at one sample rate and deliver output samples at another rate. Resampling filters are often used for better symbol recovery of signals using modern digital modulation schemes. Programmable ratios ensure flexibility to cover a wide range of wireless standards.
For more information, visit Pentek.