Tekmicro Combines Fastest Available 12-bit Digitizer with Highest Density FPGA Processing
|The new Calypso-V6 Two or Six Channel 12-bit ADCs with Up To 3.6 GSPS per Channel|
At the MILCOM 2011 conference, TEK Microsystems, Incorporated, the leading supplier of VME and VXS-based signal acquisition, generation and FPGA-based processing products, has announced the latest member of our QuiXilica product family. The new Calypso-V6 supports either two 12-bit analog-to-digital converter (ADC) channels at 3.6 GSPS (Gigasamples per second) or six channels at 1.8 GSPS. Like all members of the QuiXilica-V6 VME / VXS family, the Calypso-V6 is compatible with legacy VME systems as well as newer ANSI/VITA 41 VXS based systems and combines the highest density FPGA processing available in any 6U form factor with the ultimate in ultra wide band ADC signal acquisition.
"Tekmicro is committed to providing our customers with the best available ADC technology for 10, 12, and 16 bit resolutions. The new Calypso-V6 is another industry first for Tekmicro, providing the fastest available sampling rate for 12-bit signal acquisition in a 6U VME / VXS form factor”, comments Andrew Reddig, CEO / CTO of Tekmicro. “By using National’s latest ADC device, we are able to meet our customers’ requests for multi-channel direct L band acquisition and processing, with 900 MHz staring bandwidth in 2nd Nyquist mode allowing direct RF-to-digital acquisition and processing for the next generation of digital receivers”.
Calypso-V6 ADC Supports Ultra Wide Band Signal Acquisition
Calypso-V6 is based on the National Semiconductor ADC12D1800RF device which supports either a pair of channels in non-interleaved mode or a single channel using 2:1 interleaved sampling. Calypso-V6 contains four ADC devices, supporting a total of either six channels plus trigger at 1.8 GSPS or two channels plus trigger at 3.6 GSPS. In all modes, the converters provide 12-bit resolution and full power bandwidth up to 2.7 GHz. This allows Calypso-V6 to be used as a 3.6 GSPS converter for 1st Nyquist applications or as a high density multichannel building block for lower bandwidth applications using either 1st or 2nd Nyquist sampling.
Calypso-V6 also includes sample-accurate trigger synchronization in all modes, allowing coherent processing of multiple input channels both within a single card and across multiple cards. This allows applications of up to 108 channels to be supported within a single chassis. GPS and timestamp inputs are also available to support precise timing and geolocation.
High Density FPGA Processing
The Calypso-V6 contains four separate ADC devices, with each pair of devices assigned to its own front end FPGA for signal processing. The front end FPGAs can be configured with LX240, SX315, or SX475 devices, providing both the highest FPGA processing density available in any 6U form factor today as well as the only VME / VXS platform supporting Virtex-6 FPGAs.
The two front end FPGAs are supplemented with a “backend” FPGA which can be used for additional processing or for backplane or front panel communications. The backend FPGA can also be configured with a range of Xilinx Virtex-6 FPGA options, from the standard LX240 up to a SX475, depending on application requirements.
Memory, Network and Interconnect Resources
The Calypso-V6 includes six banks of DDR3 memory with total capacity of 5 GB and aggregate throughput of 32 GB/s, supporting a wide range of signal processing algorithms with deep memory buffering of the entire signal acquisition stream. The backend FPGA also has two banks of QDR-II memory available for applications that require memory with lower random access latency. Each FPGA supports a Gigabit Ethernet interface for control plane purposes, along with a range of front panel and backplane I/O connections for high speed communications with other processing cards. Calypso-V6 provides an onboard Gigabit Ethernet switch for network connectivity between the front panel, backplane interface, and all onboard FPGAs.
The Calypso-V6 is based on Tekmicro’s QuiXilica-V6 baseboard which provides the tools necessary for reliability, availability and maintainability in deployed applications. A dedicated system management processor can be used to monitor power and thermal sensors, and is also responsible for managing FPGA initialization and bitstream management. Tekmicro’s QuiXstart technology, included in QuiXilica products since 2005, supports FPGA bitstreams using either onboard flash memory or offboard network resources to support secure applications while maintaining hardware in a sanitized state.
Ruggedization Support for Deployed Applications
The Calypso-V6 is available for a wide range of operating environments, including commercial grade, rugged air and conduction cooled, allowing the card to be used for both laboratory and deployed requirements in both VME and VXS systems.
Comprehensive Developers Kit Speeds Time To Market
The Calypso-V6 is supported by a comprehensive Developer’s Kit that includes interface IP cores for all onboard resources along with Tekmicro’s QuiXtream network toolkit for rapid application development using network-enabled FPGAs. Reference designs are included, with source code, to support quick prototyping of user applications with minimal learning curve.
The Calypso-V6 will be available in for early access customers starting in January 2012.
About TEK Microsystems, Incorporated.
Founded in 1981 and headquartered in Chelmsford, Massachusetts, Tekmicro designs, manufactures and delivers a wide range of advanced high-performance boards and systems for embedded real-time signal acquisition, generation, processing, storage and recording. Tekmicro provides both commercial and rugged grade products which are used in real-time systems designed for a wide range of defense, intelligence and industrial applications such as C4ISR, signals intelligence, electronic warfare and radar. For additional information see www.tekmicro.com.
Source: TEK Microsystems Inc