SiGe-based ADCs/DACs double COTS Electronic Warfare processing performance
New ADC and DAC technology based on Silicon-Germanium (SiGe) promises unprecedented levels of functionality and capability for demanding signal processing applications. These new devices, which bring the advantages of SiGe to rugged deployed military systems for the first time, can deliver 2x the performance of currently available ADC/DAC devices, establishing a new class of processing performance for defense and aerospace applications. When deployed on open architecture platforms utilizing OpenVPX COTS boards with latest-generation FPGAs, the new SiGe-based technology will provide an ideal platform for radar, SIGINT, and EW applications.
New levels of performance
These types of EW applications require a balance between speed and resolution. Compared to earlier designs, these new SiGe-based ADCs/DACs, supplied by vendors such as Tektronix, feature higher sample rate performance. They leverage high-performance data conversion techniques to optimize device performance characteristics such as calibration, power, and signal/noise ratios. These ADCs, for example, deliver the best speed and Effective Number of Bits (ENOB) currently available from a commercial device. An additional advantage of SiGe-based devices is their low latency, an important feature for bandwidth-sensitive EW applications.
Until recently, COTS ADC devices on the market have topped out at 3 GSps at 8 bits of resolution. In the past few years though, we’ve begun to see devices that can perform at up to 6 GSps at 8 bits. The new SiGe-based generation of ADCs is delivering the next big performance leap, doubling bandwidth speeds up to 12 GSps. For EW applications, the benefit is straightforward: The higher sample rates and associated bandwidth ensure better spectrum coverage and improved Probability Of Intercept (POI) for signals of interest. In addition, the performance of these 8-bit parts surpasses off-the-shelf 10-bit ADCs in terms of Spurious Free Dynamic Range (SFDR). SFDR is a measure of the performance of the ADC, and higher SFDR ensures improved identification of signals of interest in a crowded spectral environment. Typically, a first pass of the spectrum segment is done at high bandwidth to pull in as much data as possible to obtain areas of interest to analyze, after which a higher-resolution, lower-bandwidth solution is leveraged to focus on specific targets. As warfighters see a far greater range of the spectrum, more lives are saved and mission success probability is increased because of faster, more accurate identification of threats and improved response options.
With this new generation of ADCs and DACs, EW system designers get increased bandwidth with sufficient resolution. It’s a win-win with high-quality signal identification and improved immunity from noise that supports real-time analysis of larger amounts of data. While it’s possible to obtain ADCs that operate at 14- to 16-bit resolution rates, these devices typically sample in the hundreds of Msample range, far below the 12 GSps rates at 8 bits now reachable.
SiGe-based ADCs/DACs also deliver lower power performance (as measured in Watt/GHz). In addition to their higher speed and lower power, these ADCs/DACs also offer reduced leakage current and less sensitivity to temperature fluctuation, which becomes more critical in EW electronics as process architectures shrink.
Faster I/O devices meld with OpenVPX and FPGAs
These faster ADCs and DACs can be readily built into rugged open architecture OpenVPX-based EW systems using FPGAs to perform high-speed algorithm processing in the digital domain; this paradigm minimizes the need for performing downconversions or other filtering stages that would typically be handled in an external analog tuner logic, slowing down performance and requiring additional on-board components that use valuable board real estate and add unwanted heat.
The new ADC/DAC components can be deployed on OpenVPX hosts so that the system designer has the flexibility to swap out different front-end configurations as required while maintaining a common back-end and software interface to the FPGA to address different types of applications. An example of an OpenVPX board that delivers the latest generation of devices is Curtiss-Wright’s rugged CHAMP-WB-DRFM 6U card set, combining a Tektronix TADF-4300 module featuring a SiGe-based 12.5 GSps 8-bit ADC and a 12 GSps 10-bit DAC (Figure 1), on a Xilinx Virtex-7 FPGA-based 6U VPX card, the CHAMP-WB. This modular design approach actually provides designers with two levels of modularity or reconfigurability: The first level is the ability to swap out different mezzanines as needed, and the second level is the inherent reconfigurability of the FPGA itself. This serves to benefit today’s cutting-edge EW applications.
David Jednyak CTO/COTS Technologies Curtiss-Wright Controls Defense Solutions www.cwcdefense.com