Pushing airborne ISR data recorders to new performance heights

Capturing wire rate from today’s compute-intensive intelligence, surveillance, and reconnaissance () sensor platforms brings new meaning to the old metaphor “drinking from a fire hose.” Airborne ISR systems may have hundreds of cameras and other sensors that generate data that needs to be captured and stored for later analysis. Such sensor systems can’t be slowed down to let the recording system to catch up with the flow of data.

The good news is that recent advances in processor architectures and solid-state drives (SSD) are helping recorder designers keep up with the expanding rivers of sensor data. Previously, designers of high bandwidth would turn to the high-speed, low-latency Serial Front Panel Data Port (SFPDP) communications protocol, which could handle approximately 1.6 GB of data per second using multiple channels.

Now, thanks to the introduction of built-in 40 gigabit interfaces on () boards with Intel Xeon-D processors, and the advent of a new class of superfast Non-Volatile Memory Express (NVMe) SSDs, it’s possible to design digital data recorders that can absorb upwards of 6 GB per second of streaming data, 400 percent more bandwidth then the fastest SFPDP recorder could handle. These developments open new possibilities for designers of ISR systems.

Handling the incoming sensor data is a new class of DSP boards featuring dual Xeon-D processors and two built-in 40 GbE interfaces. (See example, Figure 1.) These modules can easily absorb the incoming data and redirect it to the persistent storage media, using PCIe Gen 3 to enable the efficient movement of all the data. In one example, each 40 GbE interface is supported by x8 PCIe lanes capable of handling more than 7 GB per second of incoming data. The Xeon-D’s 12 cores run the recorder application under , moving the data through the IP stack and on to the storage. While the storage interfaces are all PCIe Gen 3, in this example x16 lanes are used.

In previous generations of recorders, the data was converted from PCIe to SATA; the new generation of recorders uses NVMe SSDs to eliminate that system bottleneck. NVMe memory is widely supported today, with laptops driving demand for increased performance. In our example, using two sets of x16 PCIe lanes, the data is efficiently moved to two removable NVMe storage modules. Using the M.2 format, the storage module can be scaled to 32 TB today, with 64 TB capacity in the near future. NVMe capacity can also be scaled down, but most sensor applications push for more storage, not less.

This new class of 40 GbE-based data recorders delivers significant improvements compared to the former top-of-the-line Serial Front Panel Data Port (SFPDP)-based recorders. For example, if the SFPDP recorder had data on eight channels, each running at 200 MB per second, its total throughput would be 1.6 GB per second. To handle a 6.4 GB would require 32 data channels, so four separate SFPDP recorder units would need to be deployed on the ISR platform, significantly adding to SWaP-C [size, weight, power, and cost].

It is now possible to design a digital data recorder with a dual-processor OpenVPX DSP board on which each of the module’s Xeon-Ds supports a 40 GbE data channel. By keeping the data as PCIe, instead of converting it to SATA and sending it to SATA SSDs, the data can be directly pipelined over the backplane to the PCIe-based NVMe SSDs. With two NVMe blades, each providing 32 TB of storage, this type of high-performance data recorder can absorb the full 6.4 GB per second data stream and store more than 2.5 hours of mission data at maximum speed.

Using this new class of data recorder – that leverage the Xeon-D processor’s built-in 40GbE interfaces and the capabilities of the superfast high-density latest generation of NVMe SSDs – designers of ISR systems can capture high-speed sensor data for post-mission analysis. The combination of a 40 GbE front end, PCIe Gen 3 infrastructure, and removable NVMe storage will enable critical mission data to be stored without compromise.

21
Figure 1: The dual Intel Xeon-D processors’ built-in 40 GbE interfaces on Curtiss-Wright’s CHAMP-XD2 module are intended to handle the high-bandwidth digital data recorder needs for ISR applications.

www.curtisswrightds.com