No such thing as too much signal processing for radar & EW systems
Signal processing fuels radar and electronic warfare systems as each application has an unquenchable thirst for more and more bandwidth and performance that is more often than not met by FPGA-based VPX computing systems.
Signal processing technology continues to evolve in both radar and electronic warfare (EW) applications as embedded computing designers work to meet the insatiable demand their military customers have for more bandwidth capability. The nature of their demands are the same year to year, but there will never be a point when they have enough signal processing to meet their needs.
Signal processing requirements from radar and EW programs are always about the same each year, but with new twists, says Rodger Hosking, vice president and co-founder of Pentek in Upper Saddle River, N.J. “In general military radar and EW designers want faster data converters with a higher sampler rate in and out. They also want higher resolution inverters for improved dynamic range and better signal detection in large and small signals. All of these demands are consistent with the need for wider bandwidth.
“People are constantly asking for faster speeds and more resolution because all the signals basically occupy the same spectrum and wider bandwidth is needed to accommodate higher-definition videos, transferring data for network traffic, etc.,” Hosking says. “The waveforms also get more complicated every year as military system designers want better algorithms to get more information, to improve signal to noise performance, and to extract signals from noisy environments.”
Application trends: EW
Each application has unique processing challenges; for EW systems, designers are pressured to keep latency low.
“While there is much commonality between signal processing solutions for radar and EW, there are differences as well, particularly when it comes to latency on EW, which is one of the biggest drivers in that field,” says Peter Thompson, senior business development manager for high performance embedded computing at GE Intelligent Platforms in Huntsville, Ala. “For EW there is also a need for increased A-D and D-A performance and resolution. Getting data in and out as quickly as possible is paramount.”
“For general EW signal processing designs there are two things we are seeing – wider bandwidth for the A-D converters and higher resolution – moving from eight to nine or 10 bits,” says Noah Donaldson, VP of product development at Annapolis Micro Systems in Annapolis, Md. “For EW applications the main thing our customers want is low latency. You want it to be as low as possible – less than a few dozen nanoseconds. It is difficult to achieve, and you have to design a number of things just right. The A-D converter and D-A converters have to be properly designed along with the firmware, if not then often users will have to redesign everything. To get minimum latency the hardware and firmware must be designed in sync.”
Typically server-class signal processing solutions are being leveraged for advanced electronic countermeasures in EW applications, says Shaun McQuaid at Mercury Systems in Chelmsford, Mass. “Advanced deep signal analysis is also starting to be talked about by our customers. The number of EW threats continues to grow and the only way to combat them is with a broad-based, multithreaded signal processing approach that handles cognitive challenges with Xeon server-class systems that have GPUs on the back end and FPGAs handling the front end. The FPGA is key to tackling low latency challenges in EW systems,” he continues.
“FPGAs are enabling much of the gains in signal processing performance on the front end,” Thompson notes. “It is a case of horses for courses. Huge bandwidth of data coming in through FPGAs on front end while on the back end parallel processing through GPUs are key.” The IPN 251 is GE’s latest 6U OpenVPX platform and combines Intel quad core and a Nvidia GPU for a design popular with radar users, he adds. (See Figure 1.)
Application trends: Radar
The insatiable need for data is what drives radar system signal processing requirements. “The military does not have a ‘good enough’ point in these applications,” Hosking says. “They want to be able to detect targets as far away as possible.
“For radar systems larger Fast Fourier Transforms (FFTs) are needed for more precise Doppler processing, where the radar systems track the speed and direction of targets,” he continues. “Improving resolution at a given range yields more accurate target information, including the mass of an aircraft and detection of unique structures and reflection characteristics of a jet. This rich set of information in the received signal can absolutely identify a target. It’s akin to looking at fingerprints 10 feet away vs. examining it under a microscope.” Pentek offers the 5973 Flexor Virtex-7 VPX-based FMC for radar applications. It features the emerging VITA 66.4 optical backplane interface to deliver systems to customers that interconnect between modules in a chassis and between chassis via high-speed optical links with the ability to connect system elements as far as 10 kilometers apart, Hosking says. (See Figure 2.)
“On the radar side you need agility in frequency and waveforms, and the capability to defeat countermeasures,” Thompson says. “Bigger and faster memories are also required with higher and higher resolutions to track more and more objects on the ground. There is a constant push to do more and to reduce SWaP at the same time. For radar we also see a lot of demand for open systems architecture now. We don’t see radar program managers wanting to be locked into a specific architecture and vendor for hardware and software. This is not necessarily true in EW as they want to do whatever it takes to meet their latency goals.”
What radar system designers want most is speed. “For radar systems, people want more channels, faster A-D converters for wider bandwidths, and then they are looking for A-D converters with the highest resolution,” Donaldson says. “For example, with phased array radar, dozens, hundreds, or thousands of A-D converters are needed and we have come up with a COTS architecture to support synchronization of that many channels.”
“A number of our radar customers are also focusing on enabling more raw processing performance onboard aircraft platforms for real-time exploitation of data before it has to be sent to the ground via weak data links,” McQuaid says. “In the radar space the appetite for more processing performance will only continue to grow.” For signal processing applications Mercury offers the HDS6603, a blade with more than one Teraflop (TFLOP) of general processing power in a single OpenVPX slot, McQuaid says. It uses two 1.8 GHz Intel Xeon E5-2600 v3 processors with 12 cores each to provide a total of 1.38 TFLOPS.
VPX, or VITA 46, based on signal processing systems are dominating the embedded niche for radar and EW systems as it is easily the best form factor for engaging switched fabrics and enabling super computing functionality for these applications.
“The data from radar and EW applications all feeds into what the DoD is calling the tactical cloud of big data that enables U.S. warfighters to have decision superiority on the battlefield,” McQuaid continues. “So in a way OpenVPX is fueling the tactical cloud as it enables the supercomputing capability and sheer processing power needed to generate the data it needs to exist. VPX is able to deliver the kind of architecture and ruggedization necessary for this tactical environment.”
“We’re seeing a lot more requests for VPX in radar and EW systems, more than CompactPCI and more than AMC or MicroTCA,” Donaldson says. “Some customers are also looking for 3U VPX due to a requirement for a smaller form factor. The 3U form factor provides a smaller Line Replaceable Unit for easy upgrades and maintenance. However, those who do not have the space constraints and need the better density still go with 6U VPX designs. Annapolis offers the WILDSTAR 7 Conduction Cooled OpenVPX 6U product, which is hot-swappable and has as many as two Xilinx Virtex 7 FPGAs per board with VX690T or VX980T FPGAs and as much as 8 GB of DDR3 DRAM for 51.2 GBps of DRAM bandwidth or up to 64 MB of QDRII+ SRAM for 32 GBps of SRAM bandwidth. It may also be air-cooled.”