Embedded signal processing enables advanced radars and EW systems with low latency

2Modern radar and electronic warfare designs rely heavily on embedded computing systems that leverage high-speed commercial processors and FPGAs to find every target or signal and enable the warfighter to respond in real time. Meanwhile, signal processing system designers are cutting costs by using parallel compute platforms such as OpenCL that work across multiple chip platforms.

The basic premise of Moore’s Law – that the performance and speed of integrated circuits doubles about every six months to two years – mirrors the computational demands of modern radar and Electronic Warfare (EW) systems that have ever-increasing performance requirements. Radar programs need to track sophisticated missiles and find targets in high-noise environments, while EW system designers are pressured to track all signals while remaining undetected by a sophisticated enemy. Clever algorithms drive these EW and radar platforms, but they need the right mix of commercial GPUs, multicore processors, and FPGAs to perform wonders at the sensor level.

Rugged embedded computing systems that leverage these components in low Size, Weight, and Power (SWaP) solutions enable this innovation throughout the sensor chain. Just as military program managers strive to improve the kill chain in modern weapon systems by shortening the time from sensor to shooter, radar and EW designers are similarly looking to tighten integration along different parts of the Intelligence, Surveillance, and Reconnaissance (ISR) sensor chain to improve not only precision in data acquisition but also to deal with latency challenges. Engineers at Mercury Systems in Chelmsford, Mass., say the chain consists of six parts – acquisition, digitization, processing, storing, exploiting, and dissemination through electronic countermeasures.

“Where I see the greatest levels of integration effort is in the sensor chain, where you couple RF stages with mixed signal acquisition and digital processing stages,” says Marc Couture, Director of Product Management at Mercury Systems. “The sensor chain stages are all about capturing the real world with an aperture, zooming in a target window in the electromagnetic spectrum, and presenting as much fidelity as possible to an analog-to-digital converter. This is how you know that your digital representation of the real world is as accurate as possible. Then your compute elements can go to work on the 1s and 0s.”

“We can expect advances in electronics to enable tighter integration of current EW subsystem components,” says Dr. Paul Monticiollo, CTO of Mercury Systems. “For example, as opposed to having separate ’boxes‘ for receivers, digital RF memory, signal processors, and threat managers, we expect to see a consolidation trend that will not only yield improved performance but also reduced long-term maintenance costs.”

Demand is constant for more speed and more density and array type products, to process all the data being acquired, says Jenny Donaldson, President of Annapolis Microsystems in Annapolis, Md. Program managers are looking toward embedded Commercial-Off-The-Shelf (COTS) systems such as OpenVPX radar, airborne telemetry, synthetic aperture radar, and signals intelligence – anything that needs fast processing, Donaldson says. Annapolis offers the WILD OpenVPX EcoSystem that mixes and matches FPGA-based COTS OpenVPX boards.

Improving latency

“In EW systems minimizing latency is very important,” Mercury’s Monticiollo continues. “Missiles move extremely fast and there is not a lot of time to react and apply a countermeasure. Systems will have to be able to operate more autonomously in case communication links are jammed. For that you will need the signal processing to have a tighter degree of interaction with the mission computer – communicating between different functions and maybe even having the mission computer integrated with signal processor. Advances in SOC designs will help this and once we have these new capabilities in the circuit world we can think about how to design new systems.”

“Low latency will be enabled by increased fabric speeds underneath individual boards and processors,” says David Jedynak, CTO at Curtiss-Wright Controls Defense Solutions in Ashburn, Va. “The low latency requirements are pushing the move toward fabrics such as Infiniband or 40 Gigabit Ethernet, so you can move data without a lot of processor overhead. Curtiss-Wright is involved in the 40 Gigabit Initiative to provide 40 gigabits per second performance in systems from end to end.”

Figure 1: GE’s XVR16 6U VME rugged single board computer uses the Haswell 4th generation Corei7 processor from Intel.
(Click graphic to zoom by 1.9x)

“The biggest thing that’s made a difference for us was the introduction of GPUDirect, which solved one of the challenges in using GPGPUs regarding latency in sensor data,” says Peter Thompson at GE Intelligent Platforms in Huntsville, Ala. “Previously you’d take a signal across PCI Express to the Intel processor to memory and then send it to the GPU, which takes extra time and creates extra latency. With some EW applications those extra nanoseconds make a world of difference because you have a finite time to gather the signal and react. GPUDirect is a piece of technology that enables you to send sensor data straight across PCIe directly to the GPU.” GE offers the XVR16 6U VME rugged single board computer for signal processing applications. (See Figure 1).

Fast FPGAs on front end

Reducing latency is also enabled by modern FPGAs on the front end of designs, where they process algorithms at very high rates. “FPGAs are front and center as the first signal processing element for our radar customers,” says Rodger Hosking, Vice President and co-founder of Pentek in Upper Saddle River, N.J. “What they are doing with radar is trying to enhance detection range, bring more resolution to the front end, etc. This all ties into getting higher resolution on the de-converters, which ties into the ability to achieve higher precision with the radar detection algorithms, so they can detect smaller targets that have weaker signal levels. They want to track the targets that are buried in noise with these algorithms and the de-converters can pull those signals out. Another thing FPGA technology enables is target classification and identification by helping correlate vehicle signatures with a known database of targets – figuring out who to whom each signal belongs.”

“There is innovation coming with the next generation of FPGAs,” Monticiollo says. “They are extremely more powerful with microprocessors being built in and heading toward true System-on-Chip (SoC) designs. High-performance FPGAs, microprocessors, and multicore processors can all be integrated on the same die, which will reduce latencies to microseconds and even nanoseconds for some applications.”

“FPGAs are good at processing wideband radar signals in real time,” Hosking says. “They are better than general-purpose processors (GPPs) They are better than GPPs in this instance because of the data rate. For example, radar systems can have as many as 48 lines running at 900 megahertz each and the only animal that can that is an FPGA. They enable flexibility in the mechanical arrangement of things throughout a radar system – not just with signal processing. For example I could also choose to put the sensor up on a box on an antenna then do the digitization and send it across the fiber optic link at high speeds to an FPGA. ”Pentek’s latest FMC carrier board for radar applications has an optical backplane interface. The 3U VPX product – the Model 5973 – is the first one from of their new Flexor line of FMC (FPGA Mezzanine Card) carriers and FMC modules.

Some industry experts see general-purpose processors taking over more of the DSP functions of FPGAs, leaving them to focus on the RF side, while reducing the costs and time associated with programming FPGAs.

“Within signal-processing applications such as radar, there is a trend to do more of the DSP functions handled by FPGAs on a GPP,” says Glenn Johnson, at Kontron in Poway, Calif. “This can make the design process more efficient and less costly as programming FPGAs in VHDL is still difficult and expensive. FPGAs in recent years have been able to do things that processors were never able to do. They started out on the RF end and progressed backwards to where they obsoleted DSP chips and ended up doing general processing. Now, thanks to advances with chips like the Intel Haswell device, the GPP is taking that burden off of the FPGAs, enabling them to focus on the RF receive and transmit chains.” Kontron’s Haswell offerings include COM Express, Mini-ITX, 6U CompactPCI, and SYMKLOUD products.

Haswell and military signal processing

While designed more with the gaming industry in mind, Intel’s 4th generation Core i7 iteration, originally codenamed Haswell, has military signal-processing designers as excited as a teenager with a new Xbox on his birthday. Often working in tandem with FPGAs on a board, the device is enabling leaps in computing performance.

“Intel dramatically improved the AVX 2.0 math instructions, which on an SAR algorithm can improve performance by as much as 50 percent,” says Eran Strod, Systems Architect at Curtiss-Wright Controls Defense Solutions. “Also, following the tenets of Moore’s Law, the device takes up less die space and has these tiny tiny graphics execution units that provide hundreds of MFLOPS. For example our 6U CHAMP-AV9 boards with Haswell will be running at 1.2 teraflops – that’s five times faster than current devices.”

“Haswell will enable radar/EW system performance enhancements with functions such as pulse compression, beamforming, Doppler processing, etc.,” Mercury’s Couture says. “AVX 2 enables it to do the linear math and DSP necessary for radar signal processing at very high speeds. Another advantage with Haswell is on the power-management side, improving performance per SWaP at the individual core level. Essentially it will slow down certain cores that are running less taxing tasks while speeding up others performing intensive tasks. The primes like Haswell because it can attack more channels with wider bandwidth providing for more coverage in the electromagnetic spectrum at any given time.”

“What’s disruptive about this product is the larger bandwidth and spectrum digitization, which improves not only the radar system’s ability to identify and track targets but also helps it avoid detection,” says Bill Pilaud, Continuum HPEC Manager at Curtiss-Wright Controls Defense Solutions. “You protect the warfighter by sending information in one band and then switching to another instantaneously, moving the signal around faster than anyone can track it.”

Saving costs through software development

Budget cuts and sequestration have the U.S. military looking everywhere to save pennies without compromising performance. In signal-processing systems they are achieving this though modular, open architectures that can leverage existing software code across multiple platforms.

“There is a lot of pressure to cut costs and to do that the integrators are looking deeper into the supply chain for help with integration,” Curtiss-Wright’s Strod explains. “They are looking for more re-use of software code from platform to platform to save on what can be extremely expensive development costs. They want to be able to take one platform-development effort and leverage it into multiple platforms.”

“Radar customers don’t just want open architectures, but to a large degree they want modularity in the system as a whole,” Thompson says. “They are looking at the entire system and breaking it up into pieces and want to have different interfaces for hardware and software to make it far easier to change individual pieces of the chain without affecting pieces to the left and right of it.

“That is starting to have an impact on what they want from embedded computing companies like GE Intelligent Platforms,” he continues. “In the past we would provide the hardware implementation of a radar processor, but now we are seeing a push to provide software solutions – not the radar application, but providing a level of middleware that is maybe more tilted toward the application than with previous applications. Before Haswell, GE started combining CPUs and GPUs on a single board with three-quarters of a teraflop in a single slot and now we have a sister product in 3U and 6U SBCs with Haswell in a VPX architecture.”

The cost of software development can also be quite high when upgrading to a VPX system from a legacy VME design. Sometimes users will shy away from it because of this, “so we are helping our customers port the software,” Couture says. Mercury did this with their upgrade of the Patriot Missile Defense System radar. “To be specific, Mercury didn’t compose or tamper with the customers’ algorithms of application code, but we did migrate the DSP libraries and the fabric infrastructure ‘plumbing’ right underneath their application. That brought them from 1990s technology right into the 2010s.”

Parallel compute languages

Open-standard software-development tools also are giving signal-processing system designers another way to reduce costs and development time. “When integrating systems with Haswell chips, FPGAs with ARM cores, etc., there are challenges in the upfront development process with time and expense,” Couture says. However, tools such as CUDA and OpenCL enable designers to work across processing platforms, with hardware no longer a dominating cost in terms of product development. Algorithm and infrastructure development are where the most expense is incurred in signal-processing designs. The trend is for the signal-processing system vendor to help lessen that burden for the end user. With open systems such as OpenVPX, there is a greater focus on software development and managing the associated costs, which can be extreme. However, parallel compute languages such as CUDA and OpenCL enable designers to work across processing platforms to reduce these costs.

“CUDA is efficient with NVIDA GPUs and the Corefire tool from Annapolis works really well – but only with Annapolis products,” Couture continues. “OpenCL, however, is the first thing I’ve seen that Texas Instruments, AMD, Xilinx, Altera, ARM, and Intel all support – and the list is growing.”